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general description the max9539/max9540 chipset provides a 3-wire (rgb) interface for 5-wire (rgbhv) video by adding and extracting the h, v, and composite sync from the graphics video signals. this chipset eliminates the problem of sync-to-video timing (skew errors) in a 5- wire interface, while reducing the number of channels required to transport video signals. the max9539 mixes the h and v sync signals and adds them to create a 3-wire interface from a 5-wire (rgbhv) input. the max9540 recovers the h and v sync signals to create a 5-wire (rgbhv) interface from the 3-wire input. the max9540 also provides a com- posite sync output. the chipset includes the max9539 sync adder and the max9540 sync extractor with 180mhz large-signal bandwidths to address display resolutions up to 1600 x 1200 at 85hz for vga-to-uxga applications. both devices feature a dc restore function, which virtually eliminates any changes in black level. the chipset uses a proprietary h and v sync addition/extraction scheme (true sync) to minimize skew errors. the max9539/max9540 are available in 28-pin tssop packages and are specified over the extended -40? to +85? temperature range. applications enterprise class (blade) servers laptop pcs web appliances keyboard-video-mouse (kvm) features 3-wire rbg to 5-wire rbghv interface supports vga-to-uxga resolution low offset voltage (1mv) 180mhz large-signal bandwidth max9539/max9540 graphics video sync adder/extractor ________________________________________________________________ maxim integrated products 1 19-0602; rev 2; 1/07 for pricing, delivery, and ordering information, please contact maxim/dallas direct! at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. ordering information part pin- package pkg code description max9539 eui+* 28 tssop u28-3 sync adder max9539eui 28 tssop u28-3 sync adder max9540 eui+* 28 tssop u28-3 sync extractor max9540eui 28 tssop u28-3 sync extractor note: all devices are specified over the -40? to +85? oper- ating temperature range. + denotes lead-free package. * future product?ontact factory for availability. h v b g r v c b g r b g r b g r h max9540 max9539 chipset diagram pin configurations appear at end of data sheet. evaluation kit available
max9539/max9540 graphics video sync adder/extractor 2 _______________________________________________________________________________________ absolute maximum ratings stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. v cc to gnd ..............................................................-0.3v to +6v v ee to gnd...............................................................-6v to +0.3v in_r, in_g, in_b, rest_r, rest_g, rest_b .....................................(v ee - 0.3v) to (v cc + 0.3v) out_r, out_g, out_b short circuit to gnd (note 1) .....................................................continuous out_r, out_g, out_b short circuit to v cc .......................................................................................5s max9539: hsync, vsync, sp_h, sp_v ................ -0.3v to (v cc + 0.3v) max9540: hsync, csync, vsync short circuit to gnd .....continuous hsync, csync, vsync short circuit to v cc .................1min sp_c, sp_v, sp_h .................................-0.3v to (v cc + 0.3v) continuous power dissipation (t a = +70 c) 28-pin tssop (u28-3) single-layer board (derate 13mw/ c above +70 c) ................................1039mw 28-pin tssop (u28-3) m ultilayer board (derate 14.3mw/ c above +70 c) ............................... 1143mw operating temperature .......................................-40 c to +85 c junction temperature ......................................................+150 c storage temperature range .............................-65 c to +150 c lead temperature (soldering, 10s) .................................+300 c max9539 dc electrical characteristics (v cc = +5v, v ee = -5v, gnd = 0v, r l = 150 ? to gnd, t a = -40 c to +85 c, unless otherwise specified. typical values are at t a = +25 c.) (notes 2 and 3) parameter symbol conditions min typ max units v cc guaranteed by psrr test 4.5 5.5 supply voltage range v ee guaranteed by psrr test -5.5 -4.5 v i cc r l = 61 90 quiescent supply current i ee r l = 55 75 ma input voltage range v in inferred from voltage gain test 0 1 v dc-restore input voltage range ? v in_restore inferred from output dc-restore rejection ratio test -0.30 +0.30 v dc-restore rejection ratio dcrr ( ? v os / ? v in_restore ) v in_restore = -0.3v to + 0.3v 28 50 db input bias current i b 2 30 a input resistance r in 400 k ? output sync amplitude v sync h or v sync is active -2.65 -2.35 -2.05 v output offset voltage v os ? v in_restore _ = 0v, t a = +25 o c (note 4) 1 8 mv temperature coefficient of output offset voltage tcv os ( ? v os / ? t a ) t a = -40 o c to +85 o c -24 v/ c voltage gain g v in = 0 to +1v +1.95 +2 +2.05 v/v gain matching ? g r to g to b 1 2 % gain linearity 0.02 % power-supply rejection ratio psrr ? v os / ? (v cc - v ee ) v cc , v ee = 4.5v to 5.5v 50 70 db note 1: continuous power dissipation rating must also be observed.
max9539/max9540 graphics video sync adder/extractor _______________________________________________________________________________________ 3 max9539 dc electrical characteristics (continued) (v cc = +5v, v ee = -5v, gnd = 0v, r l = 150 ? to gnd, t a = -40 c to +85 c, unless otherwise specified. typical values are at t a = +25 c.) (notes 2 and 3) parameter symbol conditions min typ max units hsync, vsync inputs high input voltage v ih 2v low input voltage v il 0.8 v high input current i ih v i = 5v 10 60 a low input current i il v i = 0v 2.5 a sp_h, sp_v inputs high input voltage v ih 2v low input voltage v il 0.8 v high input current i ih v i = 5v 0.1 20 a low input current i il v i = 0v 1 20 a rest_r, rest_b, rest_g inputs hold-mode droop current i droop 2 na max9539 ac electrical characteristics (v cc = +5v, v ee = -5v, gnd = 0v, r l = 150 ? to gnd, t a = -40 c to +85 c, unless otherwise specified. typical values are at t a = +25 c.) parameter symbol conditions min typ max units large-signal bandwidth lsbw v out = 2v p-p 180 mhz slew rate sr v out = 2v p-p 900 v/s channel-to-channel crosstalk x talk v out = 2v p-p at 10mhz -60 db settling time t s v out = 2v p-p to 0.1% 15 ns input voltage-noise density e n f = 100khz 30 nv/ hz hz ? (t d ) h sync only (note 5) 1 ns sync edge jitter t jitter 200 ps p-p line droop f = 50khz 0.01 % field tilt f = 60hz 0.04 % f h h sync 15 to 150 khz sync frequency range f v v sync 40 to 100 hz
max9539/max9540 graphics video sync adder/extractor 4 _______________________________________________________________________________________ max9540 dc electrical characteristics (v cc = +5v, v ee = -5v, gnd = 0v, r l = 150 ? to gnd, t a = -40 c to +85 c, unless otherwise specified. typical values are at t a = +25 c.) (notes 2 and 3) parameter symbol conditions min typ max units v cc guaranteed by psrr test 4.5 5.5 supply voltage range v ee guaranteed by psrr test -5.5 -4.5 v i cc r l = 61 90 quiescent supply current i ee r l = 54 75 ma input voltage range v in inferred from voltage gain test 0 1 v dc-restore input voltage range ? v in_restore inferred from dc-restore rejection ratio test -0.30 +0.30 v dc-restore rejection ratio dcrr ( ? v os / ? v in_restore ) v in_restore = -0.3v to + 0.3v 28 50 db input bias current i b 2 30 a input resistance r in 400 k ? output black level v black h or v sync is active: v in < -1v 1 16 mv output offset voltage v os ? v in_restore _ = 0v, t a = +25 o c (note 4) 1 8 mv temperature coefficient of output offset voltage tcv os ( ? v os / ? t a ) t a = -40 o c to +85 o c ? 24 v/ c voltage gain g v in = 0 to +1v +1.95 +2 +2.05 v/v gain matching ? g r to g to b 1 2 % gain linearity 0.02 % power-supply rejection ratio psrr ? v os / ? (v cc - v ee ) v cc , v ee = 4.5v to 5.5v 50 70 db sp_h, sp_v, sp_c inputs high input voltage v ih 2v low input voltage v il 0.8 v high input current i ih v i = 5v 0.01 20 a low input current i il v i = 0v 1 20 a rest_r, rest_g, rest_b inputs hold-mode droop current i droop 2 na hsync, vsync, csync outputs high voltage level v oh i oh (source) = +8ma 2.4 v low voltage level v ol i ol (sink) = -8ma 0.5 v
max9539/max9540 graphics video sync adder/extractor _______________________________________________________________________________________ 5 max9540 ac electrical characteristics (v cc = +5v, v ee = -5v, gnd = 0v, r l = 150 ? to gnd, t a = -40 c to +85 c, unless otherwise specified. typical values are at t a = +25 c.) parameter symbol conditions min typ max units large-signal bandwidth lsbw v out = 2v p-p 180 mhz slew rate sr v out = 2v p-p 900 v/s channel-to-channel crosstalk x talk v out = 2v p-p at 10mhz -60 db settling time t s v out = 2v p-p to 0.1% 15 ns input voltage-noise density e n f = 100khz 30 nv/ hz hz ? (t d ) h sync only (note 5) 1 ns sync edge jitter t jitter 200 ps p-p line droop f = 50khz 0.01 % field tilt f = 60hz 0.04 % f h h sync 15 to 150 khz sync frequency range f v v sync 40 to 100 hz note 2: all devices are 100% production tested at t a = +25 c. specifications over temperature limits are guaranteed by design. note 3: dc restore is not active. hsync and vsync are not applied. rest_r, rest_g, and rest_b are grounded. note 4: dc restore is active. rest_r, rest_g, and rest_b are bypassed with 1nf to ground. note 5: the sync timing error is measured as follows: the input signals are measured from the falling edge of h sync/v sync to the start of active video, called t1. the output signal is then measured from the falling edge of h sync/v sync to the start of active video, called t2. all measurements are at the 50% points as shown in figure 1. large-signal frequency response (max9539) max9539 toc01 frequency (mhz) gain (db) 100 10 -6 -5 -4 -3 -2 -1 0 1 2 3 -7 11000 in_ = 1v p-p a v = +2v/v large-signal frequency response (max9540) max9539 toc02 frequency (mhz) gain (db) 100 10 -6 -5 -4 -3 -2 -1 0 1 2 3 -7 1 1000 in_ = 1v p-p a v = +2v/v large-signal gain flatness vs. frequency (max9539) max9539 toc03 frequency (mhz) gain (db) 100 10 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 0 0.1 0.2 0.3 -0.7 1 1000 typical operating characteristics (t a = +25 c, v cc = +5v, v ee = -5v, gnd = 0v, r l = 150 ? to gnd, unless otherwise noted.)
max9539/max9540 graphics video sync adder/extractor 6 _______________________________________________________________________________________ typical operating characteristics (continued) (t a = +25 c, v cc = +5v, v ee = -5v, gnd = 0v, r l = 150 ? to gnd, unless otherwise noted.) large-signal gain flatness vs. frequency (max9540) max9539 toc03 frequency (mhz) gain (db) 100 10 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 0 0.1 0.2 0.3 -0.7 11000 in_ = 1v p-p a v = +2v/ v power-supply rejection ratio vs. frequency (max9539) max9539 toc05 -70 -60 -50 -40 -30 -20 -10 0 0.1 1 10 100 frequency (mhz) gain (db) 1000 psrr+ psrr- -70 -60 -50 -40 -30 -20 -10 0 0.1 1 10 100 power-supply rejection ratio vs. frequency (max9540) max9539 toc06 frequency (mhz) gain (db) 1000 psrr+ psrr- 50 52 54 56 58 60 62 64 -50 0 -25 25 50 75 100 supply current vs. temperature (max9539) max9539 toc07 temperature ( c) supply current (ma) i cc i ee 50 52 54 56 58 60 62 64 -50 0 -25 25 50 75 100 supply current vs. temperature (max9540) max9539 toc08 temperature ( c) supply current (ma) i cc i ee output vs. input (max9539) max9539 toc09 2 s/div in_r 1v/div hsync 5v/div out_r 2v/div output vs. input (max9540) max9539 toc10 2 s/div in_r 1v/div hsync 5v/div out_r 1v/div
max9539/max9540 graphics video sync adder/extractor _______________________________________________________________________________________ 7 max9539 pin description pin name function 1 in_r red video input 2, 7, 12 gnd ground 3 rest_r red dc restore. connect a 1nf capacitor from rest_r to gnd. 4, 9, 10, 14, 15, 20, 21, 22, 25 n.c. no connection. not internally connected. 5 i.c. internally connected. for best performance, connect this pin to gnd. 6 in_g green video input 8 rest_g green dc restore. connect a 1nf capacitor from rest_g to gnd. 11 in_b blue video input 13 rest_b blue dc restore. connect a 1nf capacitor from rest_b to gnd. 16 vsync vertical sync input 17 sp_v vertical sync polarity input 18 out_b blue output with vertical sync 19 v ee negative power-supply input. bypass with a 0.1f capacitor to gnd. 23 out_g green output with composite sync. 24 v cc positive power-supply input. bypass with a 0.1f capacitor to gnd. 26 hsync horizontal sync input 27 sp_h horizontal sync polarity input 28 out_r red output with horizontal sync
max9539/max9540 detailed description the max9539/max9540 chipset provides a 3-wire (rgb) interface for 5-wire (rgbhv) video by adding and extracting the h, v, and composite sync from the graphics video signals. this chipset eliminates the problem of sync-to-video timing (skew errors) in a 5- wire interface, while reducing the number of channels required when transporting video signals. the max9539 mixes the h and v sync signals and adds them to create a 3-wire interface from a 5-wire (rgbhv) input. the max9540 recovers the h and v sync signals to create a 5-wire (rgbhv) interface from the 3-wire input. the max9540 also provides a com- posite sync output. the chipset includes the max9539 sync adder and the max9540 sync extractor with 180mhz large-signal bandwidths to address display resolutions up to 1600 x 1200 at 85hz for vga-to-uxga applications. both devices feature a dc-restore function, which virtually eliminates any changes in black level. the chipset uses a proprietary h and v sync addition/extraction scheme (true sync) to minimize skew errors. max9539 sync adder the max9539 mixes the h and v sync signals and adds them to create a 3-wire interface from a 5-wire (rgbhv) input. sync signals are added to the input video signals. horizontal sync is added to red video, vertical sync is added to blue video, and composite sync is added to green video. composite sync is the xor function between h sync and v sync and is inter- nally generated by the max9539. the sync level of the video outputs is -2.4v. the dc-restore function removes any dc offset ( ? v in_restore ) in the rgb video inputs and sets the output black level to 0v at the back porch of the h sync. therefore, the output black level is set to 0v at the beginning of every line. figure 2 illustrates the functionality of the max9539. in this example, the sync signals are of positive polarity. max9540 sync extractor the max9540 recovers the h and v sync signals to cre- ate a 5-wire (rgbhv) interface from the 3-wire input. the output video signals are obtained by removing the sync pulses of the input video. the sync outputs correspond to the sync pulses of the input video: horizontal sync is graphics video sync adder/extractor 8 _______________________________________________________________________________________ max9540 pin description pin name function 1 in_r red video input with horizontal sync 2, 7, 12 gnd ground 3 rest_r red dc restore. connect a 1nf capacitor from rest_r to gnd. 4, 9, 10, 14, 15, 20, 25 n.c. no connection. not internally connected. 5 i.c. internally connected. for best performance, connect this pin to gnd. 6 in_g green video input with composite sync 8 rest_g green dc restore. connect a 1nf capacitor from rest_g to gnd. 11 in_b blue video input with vertical sync 13 rest_b blue dc restore. connect a 1nf capacitor from rest_b to gnd. 16 vsync vertical sync output 17 sp_v vertical sync polarity input 18 out_b blue video output 19 v ee negative power-supply input. bypass with a 0.1f capacitor to gnd. 21 csync composite sync output 22 sp_c composite sync polarity input 23 out_g green video output 24 v cc positive power-supply input. bypass with a 0.1f capacitor to gnd. 26 hsync horizontal sync output 27 sp_h horizontal sync polarity input 28 out_r red video output
obtained from the red input, vertical sync is obtained from the blue input, and composite sync is obtained from the green input. like the max9539, the dc-restore func- tion removes any dc offset in the rgb video inputs and sets the output black levels to 0v. this happens at the back porch (trailing edge) of the sync pulse. figure 3 illustrates the functionality of the max9540. in this example, the sync signals are of positive polarity. dc restore the max9539/max9540 dc-restore function removes the input signal dc level and restores 0v for the black level of the output video signal. 1nf restore capacitors are needed for the sample-and-hold circuitry at rest_r, rest_g, and rest_b. a value less than 0.5nf can cause ac instability in the sample-and-hold circuitry. a value higher than 2nf increases the settling time of the sample-and-hold circuitry, shifting the out- put black level from 0v. sync polarity sync polarity refers to the idle state and pulse ampli- tude of the sync pulse. a sync pulse that idles low and pulses high is referred to as a positive sync pulse. a sync pulse that idles high and pulses low is referred to as a negative sync pulse as seen in figure 4. to accommodate positive and negative sync input signals, the max9539/max9540 have vertical and horizontal sync polarity inputs (sp_v and sp_h). drive sp_v or sp_h high for positive sync polarity. drive sp_v or sp_h low for negative sync polarity. the max9540 also has a composite polarity input (sp_c). drive sp_c high for positive sync polarity or drive sp_c low for negative sync polarity (table 1). layout and power-supply bypassing the max9539/max9540 have an extremely high band- width and require careful board layout. for best perfor- mance use constant-impedance microstrip or stripline techniques. to realize the full ac performance of these high-speed amplifiers, pay careful attention to power-supply bypassing and board layout. the pc board should have at least two layers: a signal and power layer on one side, and a large, low-impedance ground plane on the other side. the ground plane should be as free of voids as possible. with multilayer boards, locate the ground plane on a layer that incorporates no signal or power traces. observe the following guidelines when designing the board regardless of whether or not a constant-imped- ance board is used. 1) do not use wire-wrap boards or breadboards. 2) do not use ic sockets; they increase parasitic capacitance and inductance. 3) keep lines as short and as straight as possible. do not make 90 turns; round all corners. 4) observe high-frequency bypassing techniques to maintain the amplifier s accuracy and stability. 5) use surface-mount components. they generally have shorter bodies and lower parasitic reactance, yielding better high-frequency performance than through-hole components. max9539/max9540 graphics video sync adder/extractor _______________________________________________________________________________________ 9 video sync t1 t2 video with sync sync timing delay (t d ) = t1 - t2 figure 1. sync timing delay (t d ) = t1 - t2 input logic value sp_v sp_h sp_c (max9540) 1 positive sync positive sync positive sync 0 negative sync negative sync negative sync table 1. sync polarity table
max9539/max9540 the bypass capacitors should include a 0.1f ceramic surface-mount capacitor between each supply pin and the ground plane, located as close to the package as possible. optionally, place a 10f tantalum capacitor at the power-supply pins points of entry to the pc board to ensure the integrity of incoming supplies. the power-supply trace should lead directly from the tanta- lum capacitor to the v cc and v ee pins. to minimize parasitic inductance, keep pc traces short and use surface-mount components. use surface-mount resistors for input termination and output back termination. place the termination resistors as close to the ic as possible. graphics video sync adder/extractor 10 ______________________________________________________________________________________ video input (in_) hor. sync (hsync) ver. sync (vsync) red output (out_r) blue output (out_b) green output (out_g) 0v 0.7v 0v 0v 0v 0v 0v -2.4v -2.4v 1.4v -2.4v 1.4v 1.4v 5v 5v figure 2. max9539 input and output functionality video output (out_r/b/g) sync output (_sync) 0v 1.4v 0v 5v video with sync (in_) 0.7v -2.4v figure 3. max9540 input and output functionality positive sync negative sync +5v 0v +5v 0v figure 4. sync pulse polarity
max9539/max9540 graphics video sync adder/extractor ______________________________________________________________________________________ 11 max9539 dc restore dc restore dc restore in_r h/v sync logic in_g in_b out_r out_g out_b rest_b rest_r rest_g vsync hsync gnd 1 3 6 8 11 13 16 26 24 28 23 18 2, 5, 7, 12 19 sp_v sp_h 17 27 * optional bulk capacitance 10 f* x 2 x 2 x 2 v ee 0.1 f -5v v cc 1nf 1nf 1nf +5v 10 f* 0.1 f functional diagrams
max9539/max9540 graphics video sync adder/extractor 12 ______________________________________________________________________________________ max9540 dc restore dc restore dc restore in_r h/v/c sync logic in_g in_b out_r out_g out_b rest_b rest_r rest_g vsync hsync csync gnd 1 3 6 8 11 13 16 26 24 28 23 18 2, 5, 7, 12 19 sp_v sp_c sp_h 10 f* x 2 x 2 x 2 v ee 0.1 f -5v v cc 1nf 1nf 1nf +5v 10 f* 0.1 f 21 17 27 22 * optional bulk capacitance functional diagrams (continued)
max9539/max9540 graphics video sync adder/extractor ______________________________________________________________________________________ 13 max9539 r g b h v r b g blade 2 75 ? 75 ? 75 ? 75 ? 75 ? 75 ? 75 ? 75 ? management module r g b h v 0v -1.2v +700mv 75 ? max4027 max4027 prior blade backplane blade 1 max9540 typical application diagram
max9539/max9540 graphics video sync adder/extractor 14 ______________________________________________________________________________________ 28 27 26 25 24 23 22 1 2 3 4 5 6 7 out_r sp_h hsync n.c. n.c. rest_r gnd in_r top view max9539 v cc out_g n.c. gnd in_g 21 8 n.c. rest_g 20 9 n.c. n.c. 19 10 v ee n.c. 18 11 out_b in_b 17 12 sp_v gnd 16 13 vsync rest_b 15 14 n.c. n.c. i.c. tssop pin configurations 28 27 26 25 24 23 22 1 2 3 4 5 6 7 out_r sp_h hsync n.c. n.c. rest_r gnd in_r top view max9540 v cc out_g sp_c gnd in_g 21 8 csync rest_g 20 9 n.c. n.c. 19 10 v ee n.c. 18 11 out_b in_b 17 12 sp_v gnd 16 13 vsync rest_b 15 14 n.c. n.c. i.c. tssop chip information process: bipolar
max9539/max9540 graphics video sync adder/extractor maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 ____________________ 15 ? 2007 maxim integrated products is a registered trademark of maxim integrated products, inc. boblet package information (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation, go to www.maxim-ic.com/packages .) tssop4.40mm.eps package outline, tssop 4.40mm body 21-0066 1 1 i revision history pages changed at rev 2: 1, 2, 4, 15
e nglish ? ???? ? ??? ? ??? what's ne w p roducts solutions de sign ap p note s sup p ort buy comp any me mbe rs m axim > p roduc ts > v ideo max9539, max9540 graphics video sync adder/extractor complete chipset for addition and extraction of sync to allow 3-wire transport of 5-wire r gbhv signals quickview technical documents ordering info more information all ordering information notes: other options and links for purchasing parts are listed at: http://www.maxim-ic.com/sales . 1. didn't find what you need? ask our applications engineers. expert assistance in finding parts, usually within one business day. 2. part number suffixes: t or t&r = tape and reel; + = rohs/lead-free; # = rohs/lead-exempt. more: see full data sheet or part naming c onventions . 3. * some packages have variations, listed on the drawing. "pkgc ode/variation" tells which variation the product uses. 4. devices: 1-4 of 4 m ax9539 fre e sam ple buy pack age : type pins footprint drawing code/var * te m p rohs/le ad-fre e ? m ate rials analys is max9539eui+ tssop;28 pin;64 mm dwg: 21-0066i (pdf) use pkgcode/variation: u28+3 * -40c to +85c rohs/lead-free: lead free materials analysis max9539eui+t tssop;28 pin;64 mm dwg: 21-0066i (pdf) use pkgcode/variation: u28+3 * -40c to +85c rohs/lead-free: lead free materials analysis m ax9540 fre e sam ple buy pack age : type pins footprint drawing code/var * te m p rohs/le ad-fre e ? m ate rials analys is max9540eui+ tssop;28 pin;64 mm dwg: 21-0066i (pdf) use pkgcode/variation: u28+3 * -40c to +85c rohs/lead-free: lead free materials analysis max9540eui+t tssop;28 pin;64 mm dwg: 21-0066i (pdf) use pkgcode/variation: u28+3 * -40c to +85c rohs/lead-free: lead free materials analysis didn't find what you need? next day product selection assistance from applications engineers parametric search applications help quickview technical documents ordering info more information des c ription key features a pplic ations /u s es key spec ific ations diagram data sheet a pplic ation n otes des ign guides e ngineering journals reliability reports software/m odels e valuation kits p ric e and a vailability samples buy o nline p ac kage i nformation lead-free i nformation related p roduc ts n otes and c omments e valuation kits doc ument ref.: 1 9 -0 6 0 2 ; rev 2 ; 2 0 0 7 -0 2 -1 2 t his page las t modified: 2 0 0 7 -0 2 -1 2
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